Copper Pour, Thermal Vias, and the 30°C Margin You Need on Buck Converters

A measured study from our thermal lab: ground-plane area, via stitch density, and how much each one buys you in junction temperature at 5A continuous.


The Question Worth Measuring

Every datasheet for a 5A synchronous buck converter recommends "adequate copper pour" and "a generous number of thermal vias." Neither phrase has a number attached to it, and that's where most thermal failures begin. We took an IR3897 in a 5×5 PQFN, ran it at 12V→1.2V at 5A continuous in still air, and instrumented six PCB variants on the same substrate. The goal was to put real Celsius numbers against the abstract recommendations.

The baseline conditions we held constant across all six builds:

  • Ambient — 25°C still-air chamber, no forced convection.
  • Input/output — 12V to 1.2V at 5A continuous, 500kHz switching frequency.
  • Stackup — 4-layer 1.6mm FR-4, 1oz outers, 0.5oz inners, dielectric Tg 150°C.
  • Soak time — 20 minutes per measurement, with three thermocouples on the package and one in the pour 5mm from the pad.

What changed between variants was the ground-plane copper area dedicated to the converter, the number of thermal vias from the exposed pad to the inner ground plane, and the via geometry (drill diameter, plating). Everything else — components, layer order, paste mask, reflow profile — was identical. The point was to isolate the two variables a PCB designer actually controls at layout time.

"Datasheet thermal recommendations are floor-level. You need a 30°C margin from Tj-max for any commercial-grade part you expect to ship. That margin lives in the layout, not the silicon." — Pioneer Horizon thermal engineering lead

Copper Pour Area — The First-Order Variable

Copper pour is the cheapest heatsink on the bill of materials. We swept four pour sizes on the top layer beneath and around the converter — 1 sq cm, 2 sq cm, 4 sq cm, and 8 sq cm — with the inner ground plane held constant at full-board fill. With 16 thermal vias under the exposed pad held constant across all four builds, the junction-temperature numbers came in like this:

Measured Tj rise above ambient (5A continuous, 25°C ambient)

  • 1 sq cm pour — 82°C rise (Tj ≈ 107°C). Datasheet allows it; thermal margin is gone.
  • 2 sq cm pour — 61°C rise (Tj ≈ 86°C). Marginal.
  • 4 sq cm pour — 48°C rise (Tj ≈ 73°C). Comfortable.
  • 8 sq cm pour — 42°C rise (Tj ≈ 67°C). Diminishing returns.

The curve flattens hard after 4 sq cm. The dominant thermal path stops being lateral spreading through the top-layer copper and starts being bottom-side radiation and natural convection — which the pour doesn't affect. Adding copper past the 4 sq cm mark buys you roughly 1°C per additional sq cm, which is real but expensive in board real estate.

Practical rule we apply

For 1A continuous: 1 sq cm of pour per amp. For 3–5A continuous: 1 sq cm per amp on top, plus an unbroken inner ground plane of at least 6 sq cm under the converter and out to the closest mounting hole. For >5A, you're in the territory where forced air or a metal-core substrate starts to make economic sense — pure copper-pour solutions plateau.

One pattern we see in customer designs that doesn't work: splitting the pour with silkscreen reliefs or component placements that fragment the spreading area. A 4 sq cm pour cut into three 1.3 sq cm islands by other components performs like a 1.5 sq cm pour, not a 4 sq cm one. Thermal contiguity matters more than total area.

Via Stitch Density and the Diminishing-Returns Curve

Thermal vias under the exposed pad couple the package thermally to the inner ground plane. They're cheap in CAD and almost free in fab, but only up to a point. We held copper pour at 4 sq cm and swept via count from 4 to 36 under the 4×4mm exposed pad, with 0.3mm drill, 0.6mm pad, copper-filled and capped.

Measured Tj rise vs. via count (4 sq cm pour, 5A continuous)

  • 4 vias — 71°C rise. Effective thermal resistance: 9.2°C/W.
  • 9 vias — 56°C rise. 7.4°C/W.
  • 16 vias — 48°C rise. 6.3°C/W.
  • 25 vias — 45°C rise. 5.9°C/W.
  • 36 vias — 43°C rise. 5.6°C/W.

The marginal benefit from each via is roughly inversely proportional to the via count. Going from 4 to 9 vias buys you 15°C. Going from 25 to 36 buys you 2°C. The point where the slope visibly flattens is around 16 vias — a 4×4 grid at 1mm pitch under a 4×4mm pad — and that's the count we default to on this class of converter.

Drill diameter matters too

  • 0.2mm drill — 8% higher thermal resistance than 0.3mm at the same count. Surface area dominates.
  • 0.3mm drill — sweet spot. Standard fab capability, good thermal coupling.
  • 0.4mm drill — only 3% better than 0.3mm, but harder to keep solder out of without capping.

Filled-and-capped vias (resin-filled, then plated over) cost roughly 12–18% more at fab but give you the option of via-in-pad on the surrounding small caps as well — useful when you want decoupling within 2mm of the converter input. For our DFM walkthrough on when via-in-pad is worth the upcharge, see our DFM review process.

Why the 30°C Margin Isn't Optional

The IR3897 has a Tj-max of 125°C. At 5A continuous in 25°C ambient with 16 thermal vias and 4 sq cm of pour, we measured 73°C. That's a 52°C margin in the lab — but the lab is not the field. Three corrections push that margin down fast:

1. Ambient is not 25°C in the field

Industrial enclosures sit at 40–55°C ambient routinely. A unit qualified for "commercial 0–70°C" might see 60°C internal at the warmest customer site. That alone burns 35°C of your 52°C margin.

2. Tolerance stack-up on the silicon

Datasheet Tj-max numbers are typical-process. Worst-case silicon — a part at the edge of the production distribution, on a hot day, late in life — can run 5–10°C hotter at the same dissipation. Aging adds another 3–5°C over a five-year deployment as die-attach degrades.

3. Real-world board variation

Fab-to-fab variation in copper plating thickness alone moves measured thermal resistance by ±8%. Soldermask coverage over the pour varies by panel. Solder fillet height on the package changes coupling to the pad. The number you measure on your first prototype is not the number you'll see on a 10k-unit production lot.

Stack those: 25°C ambient becomes 60°C, 73°C Tj becomes 78°C from silicon worst-case and 84°C from board variation, plus the ambient delta — and you land at roughly 119°C. That's 6°C from Tj-max. One thermal cycling event, one fan-failure scenario, and you have a field return.

The 30°C design margin we hold to is what separates "passes thermal qualification on the bench" from "ships 50,000 units and the field-failure rate stays flat." It's not paranoia — it's how the math works out when you apply real tolerances.

Applying the Numbers to Your Next Buck Layout

Three layout rules that come out of the measurements, in priority order:

  1. Pour first, then place — design the copper pour outline before you place the inductor and input caps. The pour is the thermal solution; the components have to fit around it, not the other way around. Default to 1 sq cm per amp of continuous load, with no cuts narrower than 3mm anywhere in the spread path.
  2. 16 vias under the pad is the right default — 4×4 grid at 1mm pitch, 0.3mm drill, 0.6mm pad, copper-filled if your fab supports it (most do above 4 layers). Adding more vias is rarely the right tradeoff against board area; widening the pour usually wins.
  3. Inner plane integrity is non-negotiable — the layer-2 ground plane under the converter must be unbroken for at least 8 sq cm. No signal routing through it, no plane splits closer than 5mm to the converter footprint. The inner plane is doing as much thermal work as the top pour.

Validation steps before tapeout

  • Run a static-thermal simulation in your layout tool with realistic ambient and dissipation numbers. Most modern PCB tools (Altium PDN Analyzer, KiCad's experimental thermal solver, Ansys SIwave) will get you within 15% of measured.
  • Build one prototype board with three thermocouples on the converter (package top, exposed-pad corner, pour at 5mm) and verify at the operating ambient your customer will see.
  • Re-measure after 100-hour burn-in. Die-attach settles in the first 50 hours of operation and the measured Tj can drift up by 4–6°C; if you sized to a 15°C margin, you'll discover the gap here, not in the field.

If you'd like our thermal lab to run a measured characterisation on your converter layout before tapeout, share the Gerbers and operating conditions and we'll come back with a measured report — typically a 5-day turnaround. The cost of one measured run is roughly 1/40th the cost of a re-spin.

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