When HDI Pays Off — A Cost Threshold by Layer Count and BGA Pitch

The break-even analysis we run before recommending HDI: pitch, escape routing density, and the layer-count savings that make stacked microvias cheaper than a 12-layer alternative.


The Honest Question — Do You Actually Need HDI?

HDI gets recommended on too many designs that don't need it and skipped on too many designs that do. The decision comes down to one question: can you escape-route every signal from your densest BGA inside the layer budget your unit-cost target allows? If yes, you don't need HDI. If no, you have a choice between adding layers (and prepreg) or adding microvia complexity.

The four cost variables you're trading off:

  • Layer count — each pair of layers above 4 typically adds 10–18% to bare-board cost. A 12-layer board is roughly 2.4× the cost of a 4-layer board at the same area.
  • HDI structure — adding a single sequential lamination cycle with microvias adds 15–25%. Adding stacked microvias on both sides (1+N+1 stackup) adds 35–50%.
  • Aspect ratio constraints — through-hole vias have an aspect-ratio limit (~10:1 for most fabs). On thick boards with fine BGA pitch, the via stub problem alone can force HDI.
  • Yield — every additional lamination cycle adds yield risk. A 1+N+1 HDI stackup typically yields 4–6% lower than a same-layer-count through-hole equivalent.

"We've watched customers spend 40% extra on HDI to escape a 0.8mm-pitch BGA that would have escaped fine on 6 layers with proper via placement. We've also watched customers force-fit a 0.4mm BGA on 8 layers and lose three spins trying. The break-even is real but it sits in a specific place." — Pioneer Horizon design services team

Escape Routing Math — The Numbers That Decide

BGA escape routing is a geometry problem. For a given pitch, you have a fixed window between balls to route traces and place vias. The available room shrinks fast as pitch drops.

Channels between balls — what fits

  • 1.0mm pitch — 0.6mm channel between balls. Fits 2 traces at 4mil width / 4mil clearance, with through-hole vias (0.3mm drill / 0.55mm pad) cleanly. Escape is trivial: 4 layers handles most cases up to 600 pins.
  • 0.8mm pitch — 0.45mm channel. Fits 1 trace and a dogbone via per ball. Through-hole vias still work; the via-to-pad neckdown traces become the bottleneck. 6 layers comfortable; 8 if you're above 500 balls.
  • 0.65mm pitch — 0.32mm channel. One trace fits; dogbone vias get cramped. Via-in-pad starts to win on layer count. 8 layers with through-hole; 6 with microvia-in-pad.
  • 0.5mm pitch — 0.20mm channel. Zero traces fit between balls without violating 3mil/3mil rules. Via-in-pad is mandatory; microvias usually mandatory. Best case: 6 layers with stacked microvia, 10–12 layers without.
  • 0.4mm pitch — 0.15mm channel. Stacked microvia is the only practical escape. Single-lamination microvia limits you to ~250 pins; two-lamination (2+N+2) handles 600+.

The escape-routing decision tree

  1. Count rows of balls on the densest BGA. Outer two rows escape on the outer layer. Inner rows need vias.
  2. Multiply remaining rows × pin density on those rows. That's the number of vias you need to fit inside the BGA footprint.
  3. For dogbone (through-hole) routing, each via consumes one channel. For via-in-pad, each via consumes zero channels but adds fab cost.
  4. If channel utilisation exceeds 80%, you need either an additional inner layer or microvia-in-pad. The decision is purely cost-driven from there.

The Cost Break-Even — In Numbers, Per Board Area

The break-even crosses at different points depending on board area, volume, and fab tier. We benchmark against a representative regional fab (commercial-grade, IPC Class 2, 100×100mm board, 1k-unit lot, FR-4 standard).

Indicative bare-board cost (100×100mm, 1k units, ₹ per board)

  • 4-layer through-hole — ₹240
  • 6-layer through-hole — ₹360
  • 8-layer through-hole — ₹520
  • 10-layer through-hole — ₹720
  • 12-layer through-hole — ₹980
  • 6-layer 1+4+1 HDI (microvia outer layers, blind to L2) — ₹490
  • 6-layer 1+4+1 HDI, via-in-pad copper-filled — ₹580
  • 8-layer 2+4+2 stacked HDI — ₹820

Where HDI starts winning

The interesting comparisons are pairs that solve the same routing problem with different stackups:

  • 0.65mm BGA, 400 pins — 8-layer through-hole (₹520) vs. 6-layer 1+4+1 HDI (₹490). HDI wins by 6%.
  • 0.5mm BGA, 300 pins — 10-layer through-hole (₹720) vs. 6-layer 1+4+1 HDI with via-in-pad (₹580). HDI wins by 19%.
  • 0.4mm BGA, 500 pins — 12-layer through-hole (₹980) is barely manufacturable; 8-layer 2+4+2 HDI (₹820) is the production-volume option. HDI wins by 16% and gains assembly yield besides.

Where HDI is the wrong call

  • 0.8mm BGA, <300 pins — 6-layer through-hole (₹360) versus 6-layer HDI (₹490). HDI adds 36% cost for capability you don't need.
  • 1.0mm BGA, any pin count up to 600 — through-hole almost always wins. HDI is paying for headroom you'll never use.

Volume Effects and Yield

The cost numbers above are 1k-unit volume. Stackup-cost ratios change with volume because the HDI lamination steps are highly automated but front-loaded with setup; the differential narrows at higher volume.

Cost ratio (HDI vs. equivalent through-hole) by volume

  • 100 units — HDI premium 45–55%. Setup costs dominate; only worth it when through-hole won't manufacture.
  • 1k units — HDI premium 25–40%. The break-even we showed above.
  • 10k units — HDI premium 15–22%. The structural cost reduction starts mattering.
  • 100k units — HDI premium 8–14%. Often net-neutral when assembly yield is considered.

Yield differential

Every lamination cycle is a yield event. A 1+N+1 HDI structure has one additional lamination over a through-hole equivalent. A 2+N+2 has two. Typical yield deltas at a competent fab:

  • Through-hole multilayer (any layer count): 96–98%.
  • 1+N+1 HDI: 92–95%.
  • 2+N+2 HDI: 88–93%.
  • 3+N+3 HDI (rare, mostly mobile-phone-class): 82–88%.

The yield delta is real money — fab quotes typically include their yield assumption, so you're paying the yield premium implicitly. At 10k volume and 5% yield gap, that's ~500 additional boards baked into your price.

Assembly considerations

HDI usually means via-in-pad on the BGA, which means filled-and-capped vias on the BGA pads. That changes assembly:

  1. Solder paste sees a flat pad, not a dimple — paste deposit consistency improves.
  2. Reflow gas escape from under the BGA is reduced — paste design must account for it (slightly smaller apertures on inner balls, larger on outer balls).
  3. Rework on a via-in-pad BGA is roughly 2× the cost of dogbone; the BGA reballing is the same but the pad-prep step is longer.

The Decision Framework We Use With Customers

Three questions, in order. If you can answer the first two satisfactorily, you probably don't need HDI. If you can't, the third tells you which HDI stackup.

Question 1 — What's the finest BGA pitch on your board?

  • ≥0.8mm — through-hole is almost always right. Don't pay the HDI premium unless you have a compelling secondary reason (Z-axis height constraint, etc.).
  • 0.65mm — depends on pin count. Under 400 pins, through-hole works on 6 or 8 layers. Above 400 pins, run the cost comparison properly.
  • 0.5mm or finer — HDI is the production-volume answer. The question is just how aggressive.

Question 2 — What's your volume and product lifetime?

  • Prototype / EVT (10–100 units) — HDI premium is at its worst. If you can find a through-hole stackup that escapes, take it even if the production design will be HDI.
  • 1k–10k production — HDI break-even point. Run the math carefully.
  • 10k+ production — HDI almost always wins on total landed cost when escape complexity demands it.

Question 3 — What HDI stackup?

  1. 1+N+1 (single microvia, single lamination) — default choice. Covers 0.65mm and most 0.5mm BGAs up to 500 pins. Microvia from outer layer to layer 2, through-hole from layer 2 to N-1.
  2. 2+N+2 (stacked microvia, two laminations) — when 1+N+1 doesn't escape. Common for 0.4mm BGAs and high-pin-count 0.5mm BGAs.
  3. Any-layer HDI (microvia on every layer pair) — mobile-phone class. Rarely justified outside that domain.

What we always do at concept stage

  • Build a quick escape-routing test in CAD on the densest BGA — just the breakout, no global routing. This tells us in an afternoon whether the stackup we're proposing actually works.
  • Request quotes from two fabs at the candidate stackups. Costs vary by ±15% between fabs, and which stackup wins can flip on the same design.
  • Compare against the next-cheaper alternative even if it doesn't seem feasible. Sometimes a smarter BGA-rotation or a part-substitution saves you a stackup tier entirely.

If you'd like us to run the HDI break-even calculation on a specific design before committing the stackup, share the BOM and the BGA part numbers and we'll come back with a numbered comparison within three working days.

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