Brushless ESC Design — Gate Driver Selection, Thermal Headroom, and the 60A Reality

An electronic speed controller for a quadcopter motor is a 60×40 mm board carrying 50-80 A peak through six MOSFETs at switching frequencies of 8-32 kHz. It is, by any reasonable measure, a power-electronics module — closer to a motor-drive industrial inverter than to a typical embedded board. But because drone designers tend to come from the digital side, ESCs often get laid out like digital boards with thicker copper, and then they cook in the first hover test.

The four ingredients that decide whether a drone ESC reaches its rated current without thermal runaway are: the gate driver IC, the MOSFETs, the current-sense topology, and the copper-pour layout that connects them. None of those are independent choices — they cascade. Pick the wrong MOSFET and the gate driver can't switch it fast enough. Pick the wrong sense topology and your loop bandwidth caps out. Pick the wrong layer stackup and your thermal margin disappears.

The three numbers we anchor every ESC design to

• Continuous current rating — the current the ESC can deliver indefinitely without exceeding a 100°C MOSFET junction temperature at 25°C ambient. This is what the customer asks about.
• Peak / burst rating — typically 1.5-2× continuous, sustainable for 5-10 seconds. This is what punches the drone through a wind gust.
• Switching frequency — for a typical 14-pole BLDC motor at 8,000 RPM electrical, you want a control-loop bandwidth of 2-4 kHz, which sets PWM at 16-32 kHz to keep the loop crisp.

"An ESC that runs cool at 30 A is a different design from one that runs at 30 A. Lab-bench works; the sky is unforgiving." — Pioneer Horizon power-electronics lead

The rest of this article walks gate-driver selection, MOSFET choice, current sensing, and thermal layout — in the order you should make those decisions when starting an ESC from scratch.

The gate driver IC is the translator between the MCU's 3.3 V PWM logic and the 10-12 V gate-drive level the power MOSFETs need to switch cleanly. Three parameters dominate the choice.

1. Peak gate-drive current

Total gate charge Qg divided by switching transition time tr gives the peak current the driver needs to supply. For a typical 80 nC MOSFET switching in 50 ns, that's 1.6 A peak. A driver rated for 2 A or higher gives margin and faster edges (lower switching loss). Common picks:

• TI DRV8307 — 1.5 A peak, integrated three-phase driver, bootstrap, dead-time programmable. Solid choice for sub-30 A ESCs.
• Allegro EG2104 — half-bridge driver, used in pairs or triples. 2 A peak. Tighter dead-time control than DRV8307.
• UCC27710 (or ISL2111) — high-side / low-side driver pair, 5 A peak, used for high-current (≥60 A) racing ESCs where switching speed matters.
• Texas Instruments LMG1210 — GaN-capable driver if the MOSFETs are GaN (rare on drone ESCs today but emerging).

2. Bootstrap topology

High-side N-channel MOSFETs need a gate voltage above the high-side rail. Bootstrap topology uses a capacitor and diode pair to develop this rail when the low-side transistor turns on. The bootstrap cap value is set by the gate charge and the maximum PWM duty cycle — a typical 100 nF for 80 nC gate at <95% duty cycle. Forget this and the high-side gate sags during long duty cycles, which manifests as torque ripple under high throttle.

3. Dead-time programmability

Dead time is the gap between turning off one MOSFET and turning on its complement in a half-bridge. Too short and you get shoot-through (both transistors conducting briefly, current limited only by the MOSFETs themselves). Too long and you lose torque and produce extra audible noise. Typical drone ESC dead time: 300-500 ns. Programmable dead time lets you tune for the specific MOSFET pair you're using. Fixed dead-time drivers tend to be conservative (1 µs), which gives up efficiency to avoid the failure mode.

We default to DRV8307 for sub-30 A designs and to discrete UCC27710 pairs for 60 A and above. The integrated three-phase parts simplify layout but sacrifice some control over each phase's switching independently.

Picking the MOSFET on Rds(on) alone is the most common ESC design mistake we see. Rds(on) controls conduction loss; Qg controls switching loss; avalanche rating controls survival. A MOSFET that's "too low" on Rds(on) often has high Qg and switches slowly enough to dissipate more in switching than it saved in conduction.

Loss model in 30 seconds

Total loss per MOSFET ≈ I² × Rds(on) + 0.5 × V × I × (tr + tf) × fsw, where tr+tf is the gate transition time and fsw is the switching frequency. For a 25 A continuous drone at 24 V bus, 16 kHz PWM, that's roughly 6.25 W conduction (if Rds(on) = 5 mΩ) and 1-2 W switching depending on the gate driver and Qg. Switching loss matters; it's not negligible.

Recommended families

• Infineon IRFH3702 (3 mΩ, 80 nC) — the workhorse for 20-30 A racing ESCs. DirectFET package transfers heat into the PCB efficiently.
• Toshiba TPH1R104PB (1 mΩ, 130 nC) — for 50-60 A heavy-lift designs. Lower Rds(on) saves conduction loss; higher Qg pushes you to a beefier gate driver.
• Vishay SiS104DN (5 mΩ, 35 nC) — a balanced choice for 30 A with moderate switching frequency. Low Qg lets you run smaller drivers.

Avalanche rating — the one most people skip

BLDC motors are inductive loads. When you turn the MOSFET off, the inductive energy has to go somewhere — typically into the body diode of the complementary FET, which clamps the voltage. If the clamp can't dissipate the energy fast enough, the MOSFET goes into avalanche. The spec is "single-pulse avalanche energy" (EAS) in mJ. We want at least 150 mJ for a 30 A ESC and 300 mJ+ for 60 A. Forgetting this is how customers end up with ESCs that "work in bench test" but fail after the first aggressive throttle change in flight.

Voltage headroom

For a 4S LiPo bus (16.8 V max), pick MOSFETs rated 40-60 V. For 6S (25.2 V max), pick 60-80 V. The voltage transients from inductive switching can hit 1.5× the bus voltage if your snubber design is loose; the headroom catches it.

The control loop needs to know the current in each motor phase to implement field-oriented control, to enforce the current limit, and to detect stalled-rotor conditions. Three topologies are common in drone ESCs; each has a place.

Inline shunt

• Where it sits: in series with each phase output, between the half-bridge and the motor wire.
• Pros: highest accuracy (typically ±1%), works at all duty cycles, supports full FOC.
• Cons: dissipates I²R; needs a current-sense amp (INA240 or similar) with high common-mode tolerance (the shunt floats at the motor voltage); adds parasitic inductance to the phase path.
• Used for: high-end racing and commercial ESCs running closed-loop FOC.

Low-side shunt (single, between low-side FETs and ground)

• Pros: cheapest topology; no high-side amplifier needed.
• Cons: only sees current when at least one low-side FET is on, which fails at near-100% duty cycle. Sample timing must align with the PWM low-side conduction window.
• Used for: cost-sensitive consumer drones running trapezoidal commutation.

Hall-effect (contactless)

• Where it sits: a current-sense IC (ACS758 family) with an integrated Hall sensor wraps around the phase trace.
• Pros: galvanic isolation from the motor circuit; no I²R loss; relatively robust to electrical noise.
• Cons: limited bandwidth (~120 kHz for the ACS758); accuracy degrades with temperature.
• Used for: heavy-lift drones and EVTOL platforms where the higher cost per channel is worth the isolation.

Sample timing — the bit most designers forget

For low-side shunts, you have to sample during the time both low-side FETs are conducting freewheeling current. That's a sub-microsecond window at high PWM duty cycle. The ADC has to be triggered by the PWM module, the trigger has to be aligned to the centre of the conduction window, and the ADC has to be fast enough to capture the sample before the window closes. We default to MCUs with built-in PWM-triggered ADCs (STM32G4, STM32H7) for this reason. Trying to do it from software on a slower MCU is how ESCs end up with current readings that are 30% optimistic.

An ESC at 30 A continuous dissipates 8-12 W across six MOSFETs. At 60 A continuous it's 25-40 W. Removing that heat through a 60×40 mm PCB is a layout problem, not a heat-sink problem — and it has to be solved before the first prototype is fabricated.

Layer count and copper weight

• 4 layers minimum for any ESC above 20 A continuous. Two-layer designs leave too little copper to spread heat from the MOSFET pads.
• 2 oz copper on outer layers for 30 A; 3 oz for 60 A. Inner layers can stay 1 oz for signal use.
• Heavy copper on the phase-output buses — calculate trace width from the IPC-2152 chart for a 20°C rise above ambient at peak current. A 60 A phase wants roughly 250 mil of 2 oz copper, or it can be reduced with paralleled inner-layer planes.

Thermal vias under MOSFETs

The MOSFET dissipates through the drain pad on its bottom side (DirectFET, PowerPAK, etc.). The drain pad sits over a copper region on the top layer; thermal vias drill that copper down to inner power planes that act as heat spreaders.

• Via array: minimum 12-16 thermal vias per MOSFET, 0.3 mm drill, 0.6 mm pad, on a 0.8-1.0 mm grid under the drain pad.
• Filled or plugged? For peak current paths, via-in-pad plated over is worth the cost — open vias wick solder during reflow and produce voids in the joint. We pay the via-fill cost on every ESC above 30 A.
• Inner-layer plane area: at least 2× the MOSFET footprint per device. Larger is better; we shoot for full inner-layer ground/drain planes connected by the via array.

What we measure in qualification

1. Steady-state junction temperature at rated continuous current, in still air, at 25°C ambient. Target ≤100°C — leaves margin for typical 40-55°C airframe ambient in service.
2. Junction temperature under burst — 1.5× rated current for 10 s. Target ≤125°C.
3. Thermal cycle resistance — 500 cycles between -20°C and +85°C, measuring contact resistance and PCB deformation. This is the qualification that exposes bad via-fill choices.

"The ESC datasheet says 60 A continuous. The flight log says how long. The two only agree if the layout was right." — Pioneer Horizon power-electronics lead

If you have an ESC heading into design or qualification and you'd like a thermal review or a measured benchmark against this checklist, share the layout and the target rating. We run thermal characterisation on an IR bench and return a heatmap with marked-up recommendations within five working days.